[Bug c/60918] [mips] unaligned memory copy with LWL/LWR

pinskia at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Tue Apr 22 09:20:00 GMT 2014


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60918

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
I thing gcc output is correct. Why processor are you running on that the result
is incorrect. Also quote the mips32 isa of why you think lwl and lwr work the
way think it works.



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