[Bug target/60863] Incorrect codegen in ix86_expand_clear for -Os

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60863

--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to H.J. Lu from comment #0)
> ix86_expand_clear has
> 
>   /* This predicate should match that for movsi_xor and movdi_xor_rex64.  */
>   if (!TARGET_USE_MOV0 || optimize_insn_for_speed_p ())
>     {
>       rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
>       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob));
>     }
> 
> But "xor reg,reg" has shorter encoding than "mov $0, reg".  If
> "xor reg,reg" is generated for -O, shouldn't it also be generated
> for -Os?

This is a typo, the condition should be optimize_insn_for_size_p. Just look
peepholes in i386.md after "Attempt to always use XOR for zeroing registers."
comment.

The patch that fixes the condition is preapproved - please also remove outdated
comment about predicates.