[Bug rtl-optimization/58461] [MIPS] Using LRA instead of reload increases code size for mips16

[rsandifo at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58461

rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |rsandifo at gcc dot gnu.org

--- Comment #2 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
Thanks for working on this.  As you mentioned in the gcc@ message,
there are two ways of looking at the problem: the backend costs are
wrong or LRA isn't handling the reloads as well (or both, for a third).

I think it'd be wrong for the backend to say that moves between
MIPS16 registers and other general registers are more expensive
than memory though.  Doing that could in theory pessimise post-
reload optimisation (postreload.c also compares memory and
register costs).  Other passes might look at the costs too in
future.  And a move in or out of a MIPS16 register really is as
cheap as a move between MIPS16 registers.

But of course, although the moves are cheap, registers other than
$2-$7, $16, $17 and $24 are only useful as spill space.  So if
it's better for IRA to ignore them and LRA to use them via
TARGET_SPILL_CLASS, perhaps we should enforce that directly,
by hiding other registers from IRA.  I suppose that's like
restoring the old cover classes hook, but only as an optional
feature.

I realise this isn't the point of the bug report or the attachment,
but just FWIW: the constraints shouldn't be matching the fake
FRAME_POINTER_REGNUM.  They should wait for it to be eliminated
to either STACK_POINTER_REGNUM or HARD_FRAME_POINTER_REGNUM and
match that.