[Bug target/58895] New: [SH] improve handling of signbit result

[olegendo at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58895

            Bug ID: 58895
           Summary: [SH] improve handling of signbit result
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
            Target: sh*-*-*

The handling of the result of the floating point signbit functions could be
improved in the following cases.

#include <cmath>

bool test0_OK (float x)
{
  return !std::signbit (x);
}

-m4-single -m4 -O2:
        flds    fr4,fpul
        sts     fpul,r1
        cmp/pz  r1
        rts
        movt    r0

----------------------

bool test1_NG (float x)
{
  return std::signbit (x);
}

-m4-single -m4 -O2:
        flds    fr4,fpul
        sts     fpul,r1
        cmp/pz  r1
        movt    r0
        rts
        xor     #1,r0

better:
        flds    fr4,fpul
        sts     fpul,r1
        shll    r1
        rts
        movt    r1,r0

----------------------

void test2_OK (float x, int* y)
{
  y[0] = !std::signbit (x);
}

-m4-single -m4 -O2:
        flds    fr4,fpul
        sts     fpul,r1
        cmp/pz  r1
        movt    r1
        rts
        mov.l   r1,@r4

----------------------

void test3_NG (float x, int* y)
{
  // c++11 std::signbit returns a bool

  y[0] = std::signbit (x);
}

-m4-single -m4 -O2:
        flds    fr4,fpul
        sts     fpul,r1
        cmp/pz  r1
        mov     #-1,r1
        negc    r1,r1
        rts
        mov.l   r1,@r4

better:
        flds    fr4,fpul
        sts     fpul,r2
        shll    r2
        movt    r1
        rts
        mov.l   r1,@r4    

----------------------

void test4_NG (float x, int* y)
{
  // c99 signbit macro and corresponding built-in return
  // zero or non-zero integer, i.e. MSB of x.

  y[0] = __builtin_signbitf (x);
}

-m4-single -m4 -O2:
        flds    fr4,fpul
        sts     fpul,r2
        mov.l   .L7,r1
        and     r2,r1
        rts
        mov.l   r1,@r4
.L8:
        .align 2
.L7:
        .long    -2147483648

possible alternative without 32 bit constant.
smaller size, but probably slower.
        flds    fr4,fpul
        sts     fpul,r2
        shll    r2
        movt    r1
        rotcr   r1
        rts
        mov.l   r1,@r4