[Bug target/58785] New: [ARM] LRA issue in Thumb mode with movhi

[yvan.roux at linaro dot org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58785

            Bug ID: 58785
           Summary: [ARM] LRA issue in Thumb mode with movhi
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: yvan.roux at linaro dot org

Created attachment 31039
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=31039&action=edit
testcase

The attached testcase failed on ARM with LRA enabled in Thumb mode (it is a
reduce testcase from the ICE which brakes bootstrap with Thumb).

Here LRA has to deal with thumb1_movhi_insn :

(insn 11 5 14 2 (set (reg:HI 0 r0)
        (const_int -1318 [0xfffffffffffffada])) ... {*thumb1_movhi_insn}
     (nil))

and creates new regs to do it :

11: r0:HI=r114:HI
    Inserting insn reload before:
18: r115:SI=0xfffffffffffffada
19: r114:HI=r115:SI#0
    REG_EQUAL 0xfffffffffffffada

 Choosing alt 6 in insn 18:  (0) l  (1) mi {*thumb1_movsi_insn}
 Creating newreg=116 from oldreg=115, assigning class LO_REGS to r116

18: r116:SI=0xfffffffffffffada
    Inserting insn reload after:
20: r115:SI=r116:SI

 Creating newreg=117, assigning class LO_REGS to scratch r117

and during this move processing,
gen_thumb_movhi_clobber(rtx_def*,rtx_def*,rtx_def*) is called with a first rtx
parameter that doesn't satisfy the constraint of being a strict memory address
(it is a register).

command line to reproduce:

cc1 -quiet thumb2-lra.i -O2 -mthumb -mlra