[Bug middle-end/49207] Instruction scheduling error in GCC mips cross-compiler
pinskia at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Sun Nov 10 05:34:00 GMT 2013
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49207
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Component|c |middle-end
Resolution|--- |INVALID
--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to hanib from comment #4)
> (In reply to comment #3)
> > I think you have an aliasing problem in your code.
>
> The code I am compiling is the Perlbench benchmark from SPEC-CPU2006. If I
> compile the code for an Intel machine using -O2 there is no problem. This
> problem only appears when I use the GCC MIPS cross-compiler with the -O2
> switch. I also traced through the code and the sequence of these two
> instructions should be reversed.
Perl in SPEC CPU 2006 has known aliasing bugs in it; just use
-fno-strict-aliasing.
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