[Bug rtl-optimization/59036] [4.9 regression] Performance degradation after r204212 on 32-bit x86 targets.

vmakarov at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Thu Nov 7 15:34:00 GMT 2013


--- Comment #2 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Yuri Rumyantsev from comment #0)
> After patch to improve register preferencing in IRA and to *remove regmove*
> pass we noticed performance degradation on several benchmarks from eembc2.0
> suite in 32-bit mode for all x86 targets (such as atom, slm, hsw, etc.).
> This can be reproduced with attached test-case - after fix 3 more
> instructions are generated for innermost loop (compiled with -O2 -m32
> -march=core-avx2 options):

I am just curious what is the overall score change?  Are there only performance
degradations?  Was something improved?

In general would you prefer to reverse this patch?  Because I am affraid, it
will be only solution for the PR.

I am asking this because very frequently heuristic based optimizations generate
something better and something worse.  That is their nature.

When I worked on this optimization I had to change about 15 tests from GCC
testsuites checking AVX and found that in every tests uneccessary register
shuffling moves were deleted after applying the patch.

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