[Bug target/56484] [4.8 Regression] ICE in assign_by_spills, at lra-assigns.c:1268

[jakub at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56484

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> 2013-03-05 11:06:26 UTC ---
Actually, looking more at this, I'd say combiner is innocent here, the problem
is earlier , during ce1 pass, which transforms:
   16: ax:SI=call [`output_play'] argc:0
      REG_DEAD di:DI
      REG_DEAD si:SI
   17: r60:SI=ax:SI
      REG_DEAD ax:SI
   18: flags:CCGOC=cmp(r59:SI,0)
   19: pc={(flags:CCGOC>=0)?L21:pc}
      REG_DEAD flags:CCGOC
      REG_BR_PROB 0x1c84
   20: NOTE_INSN_BASIC_BLOCK 4
    6: r60:SI=r59:SI
      REG_DEAD r59:SI
   21: L21:
   22: NOTE_INSN_BASIC_BLOCK 5
into:
   16: ax:SI=call [`output_play'] argc:0
      REG_DEAD di:DI
      REG_DEAD si:SI
   17: r60:SI=ax:SI
      REG_DEAD ax:SI
   18: flags:CCGOC=cmp(r59:SI,0)
   53: flags:CCGOC=cmp(r59:SI,0)
   54: r60:SI={(flags:CCGOC>=0)?ax:SI:r59:SI}
   22: NOTE_INSN_BASIC_BLOCK 4

i.e. does what combiner tries to avoid with hard registers.  I don't understand
why it can't use r60:SI instead of ax:SI.