[Bug target/56313] New: aarch64 backend not using fmls instruction

[josh.m.conner at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56313

             Bug #: 56313
           Summary: aarch64 backend not using fmls instruction
    Classification: Unclassified
           Product: gcc
           Version: 4.8.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: josh.m.conner@gmail.com


When this code is compiled with -O2 -ffast-math -S for an aarch64-linux-gnu
target:

float v1 __attribute__((vector_size(8)));
float v2 __attribute__((vector_size(8)));
float result __attribute__((vector_size(8)));

void foo (void)
{
  result = result + (-v1 * v2);
}

The following is generated:

    ld1    {v0.2s}, [x0]
    fneg    v2.2s, v2.2s
    ld1    {v1.2s}, [x1]
    fmla    v0.2s, v2.2s, v1.2s
    st1    {v0.2s}, [x0]

This code could be improved to:
    ld1    {v0.2s}, [x0]
    ld1    {v1.2s}, [x1]
    fmls    v0.2s, v2.2s, v1.2s
    st1    {v0.2s}, [x0]