[Bug rtl-optimization/56885] ICE: in assign_by_spills, at lra-assigns.c:1268 with -O -fschedule-insns -fselective-scheduling
mpolacek at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Tue Apr 9 06:15:00 GMT 2013
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56885
Marek Polacek <mpolacek at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2013-04-09
CC| |mpolacek at gcc dot
| |gnu.org, vmakarov at gcc
| |dot gnu.org
Target Milestone|--- |4.8.1
Ever Confirmed|0 |1
--- Comment #1 from Marek Polacek <mpolacek at gcc dot gnu.org> 2013-04-09 06:15:49 UTC ---
Confirmed with trunk/4.8, but with 4.6/4.7 I see:
x.c:20:1: error: unable to find a register to spill in class ‘DIREG’
x.c:20:1: error: this is the insn:
(insn 33 36 35 5 (parallel [
(set (reg:DI 2 cx [80])
(const_int 0 [0]))
(set (reg/f:DI 0 ax [78])
(plus:DI (reg/f:DI 1 dx [77])
(reg:DI 2 cx [80])))
(set (mem:BLK (reg/f:DI 1 dx [77]) [0 S15 A8])
(const_int 0 [0]))
(use (reg:QI 6 bp [81]))
(use (reg:DI 2 cx [80]))
]) x.c:16 884 {*rep_stosqi}
(expr_list:REG_DEAD (reg/f:DI 1 dx [77])
(expr_list:REG_UNUSED (reg:DI 2 cx [80])
(expr_list:REG_UNUSED (reg/f:DI 0 ax [78])
(nil)))))
x.c:20: confused by earlier errors, bailing out
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