[Bug target/56833] New: [4.9 Regression] Valid register is over written by reload pass

[vishnu.k_s at atmel dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56833

             Bug #: 56833
           Summary: [4.9 Regression] Valid register is over written by
                    reload pass
    Classification: Unclassified
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: vishnu.k_s@atmel.com


AVR target built with specs:

Using built-in specs.
COLLECT_GCC=/home/vishnu.k_s/build-linux_x86_64/bldcc/gcc/xgcc
Target: avr
Configured with: ../gcc-trunk/configure
--prefix=/home/vishnu.k_s/build-linux_x86_64//install --target=avr
--enable-languages=c,c++ --disable-nls --with-gmp=/proj/install/gmp-4.3.2/
--with-mpfr=/proj/install/mpfr-2.4.2/ --with-mpc=/proj/install/mpc-0.8.2/
Thread model: single
gcc version 4.9.0 20130326 (experimental) (GCC)

Above compiler generate wrong code for testcase present in
gcc.c-torture/execute/simd-1.c.
gcc options : -O1 -mmcu=atmega1280

(snip of assembly)

ldi r30,lo8(res)    ; r30/r31 is loaded with address of res
ldi r31,hi8(res)    ;
st Z,r24   

ldd r31,Y+1         ;    Modifying r31 register

sts res+1,r31
sts res+2,r27
sts res+3,r26
sts res+4,r23
...
lds r22,res+4+2
lds r23,res+4+3

ld r24,Z             ; regsiter pair r30/r31 is used to load from res
ldd r25,Z+1
ldd r26,Z+2
ldd r27,Z+3

(snip of assembly)

It looks like r31 is corrupted after reload pass.