[Bug rtl-optimization/54524] Spurious add on sum of bitshifts (forward-propagate issue)

[jan.smets@alcatel-lucent.com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54524

Jan Smets <jan.smets@alcatel-lucent.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|mips                        |mipsisa64-octeon-elf
      Known to work|                            |4.5.0, 4.5.4
      Known to fail|                            |4.6.0, 4.6.3, 4.7.1, 4.8.0

--- Comment #2 from Jan Smets <jan.smets@alcatel-lucent.com> 2012-09-18 12:41:43 UTC ---
GCC 4.5.4 => CORRECT
====================

   0:   27bdffd0        addiu   sp,sp,-48
   4:   97a5001c        lhu     a1,28(sp)
   8:   000427c0        sll     a0,a0,0x1f
   c:   00053600        sll     a2,a1,0x18
  10:   3c030040        lui     v1,0x40
  14:   00052a02        srl     a1,a1,0x8
  18:   00a42821        addu    a1,a1,a0
  1c:   00c33821        addu    a3,a2,v1
  20:   3c024000        lui     v0,0x4000
  24:   00e6302b        sltu    a2,a3,a2
  28:   00a21021        addu    v0,a1,v0
  2c:   3c040000        lui     a0,0x0
                        2c: R_MIPS_HI16 .rodata
  30:   24840000        addiu   a0,a0,0
                        30: R_MIPS_LO16 .rodata
  34:   afbf002c        sw      ra,44(sp)
  38:   0c000000        jal     0 <function>
                        38: R_MIPS_26   printf
  3c:   00c23021        addu    a2,a2,v0         <= !
  40:   8fbf002c        lw      ra,44(sp)
  44:   03e00008        jr      ra
  48:   27bd0030        addiu   sp,sp,48



GCC 4.6.3
=========
   0:   27bdffd0        addiu   sp,sp,-48
   4:   97a5001c        lhu     a1,28(sp)
   8:   3c030040        lui     v1,0x40
   c:   3c024000        lui     v0,0x4000
  10:   00054600        sll     t0,a1,0x18
  14:   01033821        addu    a3,t0,v1
  18:   00052a02        srl     a1,a1,0x8
  1c:   00e8402b        sltu    t0,a3,t0
  20:   00a21021        addu    v0,a1,v0
  24:   000427c0        sll     a0,a0,0x1f
  28:   01023021        addu    a2,t0,v0
  2c:   00c43021        addu    a2,a2,a0
  30:   3c040000        lui     a0,0x0
                        30: R_MIPS_HI16 .rodata
  34:   24840000        addiu   a0,a0,0
                        34: R_MIPS_LO16 .rodata
  38:   afbf002c        sw      ra,44(sp)
  3c:   0c000000        jal     0 <function>
                        3c: R_MIPS_26   printf
  40:   24c60001        addiu   a2,a2,1       <= !
  44:   8fbf002c        lw      ra,44(sp)
  48:   03e00008        jr      ra
  4c:   27bd0030        addiu   sp,sp,48


GCC 4.8.0
=========
   0:   27bdffd0        addiu   sp,sp,-48
   4:   97a6001c        lhu     a2,28(sp)
   8:   3c030040        lui     v1,0x40
   c:   00062e00        sll     a1,a2,0x18
  10:   00a33821        addu    a3,a1,v1
  14:   00063202        srl     a2,a2,0x8
  18:   3c024000        lui     v0,0x4000
  1c:   00e5282b        sltu    a1,a3,a1
  20:   00c21021        addu    v0,a2,v0
  24:   000427c0        sll     a0,a0,0x1f
  28:   00a21021        addu    v0,a1,v0
  2c:   00443021        addu    a2,v0,a0
  30:   3c040000        lui     a0,0x0
                        30: R_MIPS_HI16 .rodata
  34:   24840000        addiu   a0,a0,0
                        34: R_MIPS_LO16 .rodata
  38:   afbf002c        sw      ra,44(sp)
  3c:   0c000000        jal     0 <function>
                        3c: R_MIPS_26   printf
  40:   24c60001        addiu   a2,a2,1        <= !
  44:   8fbf002c        lw      ra,44(sp)
  48:   03e00008        jr      ra
  4c:   27bd0030        addiu   sp,sp,48