[Bug rtl-optimization/53190] CSE (?) CSEs asms

[rguenther at suse dot de]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53190

--- Comment #6 from rguenther at suse dot de <rguenther at suse dot de> 2012-05-03 08:19:17 UTC ---
On Thu, 3 May 2012, ubizjak at gmail dot com wrote:

> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53190
> 
> --- Comment #5 from Uros Bizjak <ubizjak at gmail dot com> 2012-05-03 08:15:00 UTC ---
> (In reply to comment #4)
> 
> > So you say that it's correct for CSE to CSE asm()s if they have the same
> > asm string and the same asm operands in case the asm is not volatile?  I was
> > not aware we would do that ;)  (but yes, it sounds like a reasonable thing)
> 
> There is nothing that prevents gcc from doing this...
> 
> BTW: fpsr is FP *status* register, an x87 CC-like internal register. This asm
> should probably depend on fpcr, a FP *control* register.
> 
> In fact, there are two FP control registers, x87 and SSE one. The later is not
> handled at all.

Well, the asm in glibc is simply

extern __inline __attribute__ ((__always_inline__)) long int
__attribute__ ((__nothrow__ )) lrintf (float __x)
{
  long int __res;
  __asm ("cvtss2si %1, %0" : "=r" (__res) : "xm" (__x));
  return __res;
}

thus the CLOBBERs somehow magically appear anyways it seems.