[Bug target/53639] x86_64: redundant 64-bit operations on 32-bit integers
ubizjak at gmail dot com
gcc-bugzilla@gcc.gnu.org
Tue Jun 12 12:21:00 GMT 2012
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53639
--- Comment #3 from Uros Bizjak <ubizjak at gmail dot com> 2012-06-12 12:21:07 UTC ---
(In reply to comment #2)
> Unfortunately that patch regressed pr49095.c testcase. So, either we limit the
> splitter to the paradoxical subreg that is created by the combiner when seeing
> SImode and followed by zero_extend to DImode of the result (done in this
> patch), or we'd need to add new peepholes for the a = mem; a &= const; mem = a;
> if (a)
> cases where a &= const has been transformed into andsi_1_zext. Uros, any
> preference?
The splitter, since the scheduler can break interesting sequence by inserting
unrelated instructions.
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