[Bug target/53020] __atomic_fetch_or doesn't generate `1 insn` variant

kirill.yukhin at intel dot com gcc-bugzilla@gcc.gnu.org
Tue Apr 17 16:25:00 GMT 2012


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53020

--- Comment #1 from Yukhin Kirill <kirill.yukhin at intel dot com> 2012-04-17 16:23:26 UTC ---
Instead, of single `locked` instruction, it generates:.L2:
        movl    %eax, %ecx
        orl     $1, %ecx
        lock cmpxchgl   %ecx, (%edx)
Similar variant for AND operation:
        lock andl      %edx, (%eax)



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