[Bug c/52926] New: gcc 4.7.0 20120324: wrong optimized asm code produced

jktu17 at gmail dot com gcc-bugzilla@gcc.gnu.org
Tue Apr 10 10:54:00 GMT 2012


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52926

             Bug #: 52926
           Summary: gcc 4.7.0 20120324: wrong optimized asm code produced
    Classification: Unclassified
           Product: gcc
           Version: 4.7.0
            Status: UNCONFIRMED
          Severity: major
          Priority: P3
         Component: c
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: jktu17@gmail.com


gcc -c hash.c -O2 -std=c99 -fno-common -Wstrict-prototypes -Wmissing-prototypes
-Wsign-compare -Wmissing-declarations -Wshadow -Wpointer-arith -Wcast-align
-Wpacked -Wformat -Wno-format-extra-args -Wformat-security -fstack-protector
-Wall -Werror -ggdb -MD -D_GNU_SOURCE -DMAJOR= -DMINOR= -DVERSION=.

gcc -o sum sum.o hash.o -lpthread -Wl,-z -Wl,defs -Wl,-zrelro


ERROR: GCC makes wrong assembler code for LongAdd function located in hash.c:

static void LongADD(void *a,void *b)
{
uint32_t s = 0;
uint16_t *a16 = (uint16_t*)a;
uint16_t *b16 = (uint16_t*)b;
int i;

for(i = 0;i<16;i++)
{
s = (uint32_t)a16[i]+(uint32_t)b16[i]+(s>>16);
a16[i] = (uint16_t)s;
}
}

static void LongADD_1(void * a,uint32_t b)
{
uint32_t bb[8];
memset(bb,0,sizeof(bb));
bb[0] = b;
LongADD(a,bb);
}

OBJDUMP show me the next code for LongAdd:

0000000000401f30 <LongADD_1>:
401f30: 48 c7 44 24 d8 00 00 mov QWORD PTR [rsp-0x28],0x0
401f37: 00 00
401f39: 48 c7 44 24 e0 00 00 mov QWORD PTR [rsp-0x20],0x0
401f40: 00 00
401f42: 31 c0 xor eax,eax
401f44: 48 c7 44 24 e8 00 00 mov QWORD PTR [rsp-0x18],0x0
401f4b: 00 00
401f4d: 48 c7 44 24 f0 00 00 mov QWORD PTR [rsp-0x10],0x0
401f54: 00 00
401f56: 31 c9 xor ecx,ecx
401f58: 89 74 24 d8 mov DWORD PTR [rsp-0x28],esi
401f5c: 31 d2 xor edx,edx
401f5e: eb 05 jmp 401f65 <LongADD_1+0x35>
401f60: 0f b7 4c 04 d8 movzx ecx,WORD PTR [rsp+rax*1-0x28]
401f65: c1 ea 10 shr edx,0x10
401f68: 01 ca add edx,ecx
401f6a: 0f b7 0c 07 movzx ecx,WORD PTR [rdi+rax*1]
401f6e: 01 ca add edx,ecx
401f70: 66 89 14 07 mov WORD PTR [rdi+rax*1],dx
401f74: 48 83 c0 02 add rax,0x2
401f78: 48 83 f8 20 cmp rax,0x20
401f7c: 75 e2 jne 401f60 <LongADD_1+0x30>
401f7e: f3 c3 repz ret

We can see that instruction at [401f60:] is skipped in 1st iteration.



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