[Bug target/50505] New: gcc-4.6.1 doesn't use "-mtune=k8-sse3" when using "-march=native"

[pacho at condmat1 dot ciencias.uniovi.es]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50505

             Bug #: 50505
           Summary: gcc-4.6.1 doesn't use "-mtune=k8-sse3" when using
                    "-march=native"
    Classification: Unclassified
           Product: gcc
           Version: 4.6.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: pacho@condmat1.ciencias.uniovi.es


This is not a regression over gcc-4.4, but I don't understand why it doesn't
tune for k8-sse3 even if my processor has sse3 support and it's detected for
-march:

\_ /usr/libexec/gcc/x86_64-pc-linux-gnu/4.5.3/cc1 -quiet - -D_FORTIFY_SOURCE=2
-march=k8-sse3 -msahf --param l1-cache-size=64 --param l1-cache-line-size=64
--param l2-cache-size=512 -mtune=k8 -quiet -dumpbase - -auxbase-strip /dev/null
-o /tmp/ccm0bSsZ.s

If I don't misremember, this is a Venice:
http://en.wikipedia.org/wiki/Athlon_64#Venice_.2890.C2.A0nm_SOI.29

$ cat /proc/cpuinfo 
processor    : 0
vendor_id    : AuthenticAMD
cpu family    : 15
model        : 47
model name    : AMD Athlon(tm) 64 Processor 3200+
stepping    : 0
cpu MHz        : 2042.838
cache size    : 512 KB
fpu        : yes
fpu_exception    : yes
cpuid level    : 1
wp        : yes
flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext fxsr_opt lm 3dnowext
3dnow rep_good nopl pni lahf_lm
bogomips    : 4085.67
TLB size    : 1024 4K pages
clflush size    : 64
cache_alignment    : 64
address sizes    : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc

Downstream closed bug as INVALID because:
"Probably because you don't "tune" for an instruction set.  It doesn't make
sense.  -mtune controls things like scheduling behavior, prefetching, branch
costs, etc.  These don't change when you tack on SSE3 instructions.  -march is
what controls which instructions sets are used.  As far as tuning is concerned
k8 and k8-sse3 are the exact same thing, because gcc has one cost model (struct
processor_costs k8_cost in gcc/config/i386.c) and machine model (m_K8 in same)
it uses for all K8 family chips."

-> https://bugs.gentoo.org/show_bug.cgi?id=384189#c5

But, if that is true, gcc man page should be fixed to drop "k8-sse3" from
-mtune options

Thanks a lot for clarifying this :-)