[Bug target/50788] [4.7 Regression] ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx -fpeel-loops -fstack-protector-all and __builtin_ia32_maskloadpd256
ubizjak at gmail dot com
gcc-bugzilla@gcc.gnu.org
Sun Oct 23 11:46:00 GMT 2011
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50788
--- Comment #7 from Uros Bizjak <ubizjak at gmail dot com> 2011-10-23 11:45:32 UTC ---
(In reply to comment #6)
> > It is OK for expanders to have match_dup. We just don't want to have
> > post-reload passes to trip on double-output to the same register.
>
> No disagreement. I just wanted to state the argument for the + approach, but
> the manual clearly points to the match_operand approach here instead.
cprop_hardreg of 4-6 branch is even more confused:
(insn 30 5 10 2 (set (reg:V4DF 22 xmm1 [63])
(const_vector:V4DF [
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
])) pr50788.c:6 1120 {*avx_movv4df_internal}
(expr_list:REG_EQUAL (const_vector:V4DF [
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
(const_double:DF 0.0 [0x0.0p+0])
])
(nil)))
(insn 10 30 16 2 (set (reg:V4DF 22 xmm1 [63])
(unspec:V4DF [
(mem:V4DF (reg/v/f:DI 5 di [orig:61 __P ] [61]) [0 S32 A8])
(reg/v:V4DI 21 xmm0 [orig:62 __M ] [62])
(reg:V4DF 21 xmm0 [63])
] UNSPEC_MASKLOAD)) pr50788.c:6 2086 {avx_maskloadpd256}
(expr_list:REG_DEAD (reg/v:V4DI 21 xmm0 [orig:62 __M ] [62])
(expr_list:REG_DEAD (reg/v/f:DI 5 di [orig:61 __P ] [61])
(nil))))
See how in (insn 10) pseudo [63] gets allocated xmm1 _and_ xmm0. Following DCE
is more than happy to throw everything out of instruction stream.
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