[Bug target/50751] SH Target: Displacement addressing does not work for QImode and HImode
oleg.endo@t-online.de
gcc-bugzilla@gcc.gnu.org
Fri Nov 18 00:03:00 GMT 2011
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50751
Oleg Endo <oleg.endo@t-online.de> changed:
What |Removed |Added
----------------------------------------------------------------------------
Attachment #25684|0 |1
is obsolete| |
--- Comment #16 from Oleg Endo <oleg.endo@t-online.de> 2011-11-17 23:58:11 UTC ---
Created attachment 25848
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25848
Proposed patch to add QImode displacement addressing
Just wanted to share some progress on this issue...
The FPUL case from before seems to be solved, but another issue is left which
is related to vector modes. For example the 20050113-1.c target test case
compiled with -O0 causes:
20050113-1.c:16:1: internal compiler error: in change_address_1, at
emit-rtl.c:2001
Please submit a full bug report,
with preprocessed source if appropriate.
This is because of the following in function sh_cannot_change_mode_class:
if (to == SFmode && VECTOR_MODE_P (from) && GET_MODE_INNER (from) == SFmode)
return (reg_classes_intersect_p (GENERAL_REGS, rclass));
IRA's last words on that are:
Reloads for insn # 52
Reload 0: FPUL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1), can't combine,
secondary_reload_p
reload_reg_rtx: (reg:SI 150 fpul)
Reload 1: reload_in (SI) = (reg:SI 65 fr1 [orig:171 <retval> ] [171])
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (reg:SI 65 fr1 [orig:171 <retval> ] [171])
reload_reg_rtx: (reg/i:SI 0 r0)
secondary_in_reload = 0
deleting insn with uid = 26.
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