[Bug middle-end/33349] Redundant zero-extension of registers

[gcc.hall at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33349

Jeremy <gcc.hall at gmail dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |gcc.hall at gmail dot com

--- Comment #2 from Jeremy <gcc.hall at gmail dot com> 2011-06-16 11:27:24 UTC ---

Another example I came across ...

  unsigned short sw;
  asm( "fnstsw %0" : "=a" (sw) );

  if( sw & FE_DIVBYZERO )
    ...   
  if( sw & FE_OVERFLOW )
    ...  
  if( sw & FE_UNDERFLOW )
    ...

generates:

    movzx   eax, ax # D.14460, sw

    test    al, 1   # D.14460,

    test    al, 4   # D.14460,

    test    al, 8   # D.14460,