[Bug target/47754] [missed optimization] AVX allows unaligned memory operands but GCC uses unaligned load and register operand

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47754

Richard Guenther <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |rth at gcc dot gnu.org

--- Comment #4 from Richard Guenther <rguenth at gcc dot gnu.org> 2011-02-16 10:49:30 UTC ---
Note that GCC doesn't use unaligned memory operands because it doesn't have
the knowledge implemented that this is ok for AVX, it simply treats the
AVX case the same as the SSE case where the memory operands are required to be
aligned.  That said, unaligned SSE and AVX moves are implemented using
UNSPECs, so they will be never combined with other instructions.  I don't know
if there is a way to still distinguish unaligned and aligned loads/stores
and let them appear as regular RTL moves at the same time.

Richard, is that even possible?