[Bug c/49934] New: gcc 4.6.1 messes up code

[andy_code at mailup dot net]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49934

           Summary: gcc 4.6.1 messes up code
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: andy_code@mailup.net


here is the original function 

void keypad_isr(void) 
{ 
    /*  read a character from the key buffer */ 
    FPGA_UART_DATA     *ptr;          /* volatile register makes no dif */
    FPGA_UART_DATA     kpd; 
    int g; 
    int n; 
    KEYBUFFER     *kb; 
    char     ch; 

    kb    = &key_buffer; 
    asm(" halt");          /* just for debugging */ 
    ptr = FPGA_UART;   /* make a pointer to the FPGA register */ 
    // read upto 8 keys from the keypad 
    for( n = 0; n < 8 ; n++ ) 
    { 
        kpd    = *ptr;        /* read from register  (only do this ONCE) */ 
        g = kpd.fifo_cnt; 
        if(g == 0) 
            return; 
        ch = (char) kpd.rx_data; 
        kb->status = ch; 
        if( ch != 0 && ch != -1 ) 
        { 
            if ( kb->current_location >= MAX_KEY_BUFFERS_SIZE-1 ) 
            { 
                kb->current_location = MAX_KEY_BUFFERS_SIZE-1; 
            } 
            kb->key_buff[kb->current_location] = ch; 
            kb->current_location++; 
        } 
    } 
} 

ok now here is my problem, gcc does not use an address register for the
pointer, and it insists on reading the FPGA directly twice ???? 
here is generated assembly from gcc. 

dat's not wot I rit...

keypad_isr: 
        lea (-12,%sp),%sp 
     movem.l #1036,(%sp) 
        move.w -1073741664,%d0       
        clr.l %d1 
        move.w %d0,%d1                   
        moveq #13,%d2 
        lsr.l %d2,%d1 
        tst.b %d1 
        jeq .L3 
        moveq #8,%d1 
        lea key_buffer+33,%a1 
        lea key_buffer,%a0 
        lea key_buffer+1,%a2 
        jra .L5 
.L8: 
        move.w -1073741664,%d0       <<< --- look its done it again ????? 
        clr.l %d2 
        move.w %d0,%d2                  <<< --- ARRRGGGgg its knackered my FPGA 
        moveq #13,%d3 
        lsr.l %d3,%d2 
        tst.b %d2 
        jeq .L3 
.L5: 
        move.b %d0,%d2 
        move.b %d0,(%a1) 
        move.l %d2,%d0 
        addq.l #1,%d0 
        and.l #255,%d0 
        moveq #1,%d3 
        cmp.l %d0,%d3 
        jcc .L6 
        clr.l %d0 
        move.b (%a0),%d0 
        move.b #30,%d3 
        cmp.l %d0,%d3 
        jcc .L7 
        move.b #31,(%a0) 
.L7: 
        move.b (%a0),%d0 
        clr.l %d3 
        move.b %d0,%d3 
        move.b %d2,(%a2,%d3.l) 
        addq.l #1,%d0 
        move.b %d0,(%a0) 
.L6: 
        subq.l #1,%d1 
     jne .L8 
.L3: 
        movem.l (%sp),#1036 
        lea (12,%sp),%sp 
        rts