[Bug rtl-optimization/48596] [4.7 Regression] [SH] unable to find a register to spill in class 'FPUL_REGS'

[kkojima at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48596

--- Comment #2 from Kazumoto Kojima <kkojima at gcc dot gnu.org> 2011-04-18 12:47:21 UTC ---
I'm looking into why fr14 is allocated to r242 when -O1 is specified.
Here is the info about r242 from .ira dump with -O1

    r242: preferred GENERAL_REGS, alternative GENERAL_FP_REGS, allocno
GENERAL_FP_REGS
    a20 (r242,l1) best GENERAL_REGS, allocno GENERAL_FP_REGS
...
  a20(r242,l1) costs: R0_REGS:0,0 FPUL_REGS:305,305 SIBCALL_REGS:0,0
GENERAL_REGS:0,0 FP0_REGS:2550,2550 FP_REGS:2550,2550 DF_HI_REGS:2550,2550
DF_REGS:2550,2550 GENERAL_FP_REGS:5277,5277 GENERAL_DF_REGS:5277,5277
ALL_REGS:5277,5277 MEM:3880,3880

In contrast, r242 gets GENERAL_REGS for allocno with -O2

    r242: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
    a20 (r242,l1) best GENERAL_REGS, allocno GENERAL_REGS
...
  a20(r242,l1) costs: R0_REGS:0,0 FPUL_REGS:305,305 SIBCALL_REGS:0,0
GENERAL_REGS:0,0 FP0_REGS:3892,3892 FP_REGS:3892,3892 DF_HI_REGS:3892,3892
DF_REGS:3892,3892 GENERAL_FP_REGS:6619,6619 GENERAL_DF_REGS:6619,6619
ALL_REGS:6619,6619 MEM:3880,3880

and for revision 171582 with -O1

    r242: preferred GENERAL_REGS, alternative NO_REGS, cover GENERAL_REGS
    a20 (r242,l1) best GENERAL_REGS, cover GENERAL_REGS
...
  a20(r242,l1) costs: R0_REGS:0,0 SIBCALL_REGS:0,0 GENERAL_REGS:0,0
FP0_REGS:2550,2550 FP_REGS:2550,2550 FPUL_REGS:305,305 MEM:3880

With -O1, the lines 1713-1714 of ira-costs.c set allocno to
GENERAL_FP_REGS in this case

1707          if (best_cost > i_mem_cost)
1708            regno_aclass[i] = NO_REGS;
1709          else
1710            {
1711              /* Make the common class the biggest class of best and
1712             alt_class.  */
1713              regno_aclass[i]
1714            = ira_reg_class_superunion[best][alt_class];

Is there any way to notify IRA that the alt_class will be too costy
in some cases?