[Bug c/45726] New: Thumb2 instruction emitted for incompatible CPU
rafael dot carre at gmail dot com
gcc-bugzilla@gcc.gnu.org
Sun Sep 19 10:05:00 GMT 2010
% cat test.c
union prop_data_t
{
unsigned int u;
struct
{
unsigned short s1;
unsigned short s2;
};
};
union prop_data_t broken (int a, int b)
{
union prop_data_t var;
if (a)
{
var.s2 = 0;
var.s2 = b ? a : 2;
if (var.s2)
return var;
}
var.u = 0;
return var;
}
% echo $CC
/usr/local/arm-elf-eabi-cvs/bin/arm-elf-eabi-gcc
% $CC -mcpu=arm9tdmi -c test.c -O -pipe
{standard input}: Assembler messages:
{standard input}:25: Error: selected processor does not support ARM mode
`movteq r0,2'
% $CC -mcpu=arm9tdmi -c test.c -Ofast -pipe
{standard input}: Assembler messages:
{standard input}:23: Error: selected processor does not support ARM mode
`movteq r3,2'
% $CC -mcpu=arm9tdmi -c test.c -pipe
% $CC -v
Using built-in specs.
COLLECT_GCC=/usr/local/arm-elf-eabi-cvs/bin/arm-elf-eabi-gcc
COLLECT_LTO_WRAPPER=/usr/local/arm-elf-eabi-cvs/libexec/gcc/arm-elf-eabi/4.6.0/lto-wrapper
Target: arm-elf-eabi
Configured with: ../gcc-4.6-20100918/configure
--prefix=/usr/local/arm-elf-eabi-cvs --target=arm-elf-eabi --enable-lto
--enable-languages=c --disable-docs --disable-libssp
Thread model: single
gcc version 4.6.0 20100918 (experimental) (GCC)
%
Using 20100918 snapshot
reduced from
http://svn.rockbox.org/viewvc.cgi/trunk/apps/plugins/goban/sgf.c?revision=20001&view=markup
I tried to see which optimization broke with -Ox -Q --help=optimizers but the
list printed doesn't seem to be complete.
--
Summary: Thumb2 instruction emitted for incompatible CPU
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: rafael dot carre at gmail dot com
GCC target triplet: arm-elf-eabi
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45726
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