[Bug c/41458] New: Inefficient write of 32 bit value to 16 bit volatile on ARM

[tobias at ringis dot se]

GCC from at least 4.1.1, up to and including 4.4.1 generates two redundant bit
shift operations when writing a 32 bit value to a 16 bit variable. Example:

  volatile unsigned short v1;
  void test1(unsigned x) { v1 = x; }

This code generates the following when compiled with "arm-elf-gcc -O2 -S -o-
tmp.c":

        mov     r0, r0, asl #16
        ldr     r3, .L3
        mov     r0, r0, lsr #16
        strh    r0, [r3, #0]    @ movhi

If compiled with GCC 3.4.4, or if the volatile is removed, the expected code is
generated:

        ldr     r3, .L7
        strh    r0, [r3, #0]    @ movhi

This also does not happen with GCC 4.4.1 for i586-redhat-linux.  It generates
identical code whether the volatile is there or not.


-- 
           Summary: Inefficient write of 32 bit value to 16 bit volatile on
                    ARM
           Product: gcc
           Version: 4.4.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: tobias at ringis dot se
 GCC build triplet: i586-redhat-linux
  GCC host triplet: i586-redhat-linux
GCC target triplet: arm-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41458