[Bug target/39423] [SH] performance regression: lost mov @(disp,Rn)

chrbr at gcc dot gnu dot org gcc-bugzilla@gcc.gnu.org
Thu Mar 12 15:04:00 GMT 2009



------- Comment #9 from chrbr at gcc dot gnu dot org  2009-03-12 15:04 -------
The attached patch improves the SH generation, but I noticed a small regression
with the ARM that could make use before of a shifted constant addressing mode,
so not using the extra register for the value.

A target description check should be done while expanding the
canonicalization, that should not be done only when a base+cst addressing mode
exists and the cst must be shifter in a register. Any input welcome to how
to target conditionalize this transformation.

No performance impact was noticed on i686 however.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39423



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