[Bug target/37488] register allocation spills floats needlessly
vmakarov at redhat dot com
gcc-bugzilla@gcc.gnu.org
Mon Jun 29 19:45:00 GMT 2009
------- Comment #7 from vmakarov at redhat dot com 2009-06-29 19:44 -------
Paolo, Steven, thanks for looking into this problem. Using the mips approach
is a good idea. Although the costs of FLOAT_REGS and SSE_REGS are the same in
ira-costs.c, IRA should prefer SSE_REGS or FLOAT_REGS depending on -fpmath=
option.
The implementation will take some time because choosing a cover class depends
not only on order of them in IRA_COVER_CLASSES macro but also on order of them
in enum reg_class. I hope I'll have a patch on this week.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37488
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