[Bug rtl-optimization/40679] Optimizer handles loops with volatiles and post-incr. wrong
bastian dot schick at sciopta dot com
gcc-bugzilla@gcc.gnu.org
Wed Jul 8 08:24:00 GMT 2009
------- Comment #2 from bastian dot schick at sciopta dot com 2009-07-08 08:24 -------
(In reply to comment #1)
>
> Sent from my iPhone
Oh, dude (which one :-)
> On Jul 8, 2009, at 12:32 AM, "bastian dot schick at sciopta dot com"
> <gcc-bugzilla@gcc.gnu.org
> > wrote:
>
> > If the following code is compiled with -Os for ARM or ColdFire, the
> > exit
> > condition for the loop is removed.
> > Replacing *tbl++ with tbl[i] or using unsigned long instead of
> > volatile
> > unsigned long does not show the problem.
> > I suspect the post-increment optimization to be the problem, because
> > the
> > PowerPC version does not show the problem.
> > Also: Using a different start-address for tbl, does not show the
> > problem.
>
> It looks more like a wrapping issue. 4*64 = 256. So we go from -256u
> to 0 which causes wrapping of the pointer which is undefined and
If so, it should not be used, but it seems to be a new optimization as 3.4.4
does not use it.
> therefor I think gcc is doing the correct thing (If got my numbers
> correct).
Replacing *tbl++ by tbl[i] gives this ARM code:
.L2:
mov r3, #10
str r3, [r2], #4
cmp r2, #0
bne .L2
bx lr
See, gcc knows about the wrapping but still the *tbl++ version misses the
end-condition which is the bug.
Addenum: x86-gcc 4.3.3 (openSUSE 10.0) has the same problem.
Compiling with -O, gives correct code with *tbl++ :
.L2:
mov r3, #10
str r3, [r2], #4
cmp r2, #0
bne .L2
bx lr
--
bastian dot schick at sciopta dot com changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |bastian dot schick at
| |sciopta dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40679
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