[Bug target/39139] New: [4.4 Regression] ICE with stringop and register var

[jakub at gcc dot gnu dot org]

static inline int
foo (unsigned int x, void *y)
{
  register unsigned long r asm ("rax");
  register unsigned long a1 asm ("rdi") = a1;
  register unsigned long a2 asm ("rsi") = a2;
  a1 = (unsigned long) x;
  a2 = (unsigned long) y;
  asm volatile ("" : "=r" (r), "+r" (a1), "+r" (a2) : : "memory");
  return (int) r;
}

struct T { unsigned long t1, t2; unsigned int t3, t4, t5; };

int
bar (unsigned long x, unsigned int y, unsigned long u, unsigned int v)
{
  long r;
  struct T e = { .t1 = x, .t2 = u };

  if (x << y != u << v)
    return 5;
  r = foo (11, &e);
  return e.t3 == x;
}

distilled from xen ICEs at -Os, DIREG class register isn't available.  First
appeared between r134096 and r134467, not IRA related.


-- 
           Summary: [4.4 Regression] ICE with stringop and register var
           Product: gcc
           Version: 4.4.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: jakub at gcc dot gnu dot org
GCC target triplet: x86_64-linux


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39139