[Bug c/42367] long vector operation causes gcc to copy arguments

Shvaiger_Felix at emc dot com gcc-bugzilla@gcc.gnu.org
Mon Dec 14 16:55:00 GMT 2009



------- Comment #2 from Shvaiger_Felix at emc dot com  2009-12-14 16:55 -------
vector_size designed as general solution.

Section 5.42 (Using vector instructions through built-in functions)
of gcc info says:
"Specifying a combination that is not valid for the current architecture
will cause GCC to synthesize the instructions using a narrower mode.
For example, if you specify a variable of type `V4SI' and your
architecture does not allow for this specific SIMD type, GCC will
produce code that uses 4 `SIs'."

It is documented feature, so it is expected to work properly.
If not perfectly optimized then at least 'sane'.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42367



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