[Bug rtl-optimization/37514] [4.4 Regression] Wrong code generated for 20021120-1.c with -O3 -fomit-frame-pointer on sh4

[vmakarov at redhat dot com]

------- Comment #7 from vmakarov at redhat dot com  2008-11-24 22:26 -------
This is a latent bug in reload inheritance which IRA triggered.  Here
is the important info.  r434 was assigned to hard register 2 and r551
was assigned to memory.  After insn #1164, r434 and r551 are
synchronized and as a consequence the value of r551 is in hard register 2
(see reload1.c::reg_last_reload_reg).  After insn 179, the
pseudo-registers should be not synchronized (because of increment of r551) but
reload does not invalidate reg_last_reload_reg[551].  For this case it is done
in inc_for_reload by the following code

  /* No hard register is equivalent to this register after
     inc/dec operation.  If REG_LAST_RELOAD_REG were nonzero,
     we could inc/dec that register as well (maybe even using it for
     the source), but I'm not sure it's worth worrying about.  */
  if (REG_P (incloc))
    reg_last_reload_reg[REGNO (incloc)] = 0;

It is not done because incloc is memory assigned to pseudo-register
r551.  So after insn #179 reg_last_reload_reg[551] is still hard
register 2.  This results in that hard register #2 is used for reload #1
in in insn 831 which is wrong

I'll sent a patch solving the problem soon.

--------------------------------------------------------------

(insn:HI 1161 25 27 5 a.i:30 (set (reg/f:SI 434)
        (symbol_ref:SI ("gf") <var_decl 0x7f9a1cc6f500 gf>)) 175 {movsi_ie}
(nil))

...


(insn:HI 1164 177 179 6 a.i:15 (set (reg/f:SI 551)
        (reg/f:SI 434)) 175 {movsi_ie} (nil))


(insn:HI 179 1164 183 6 a.i:15 (parallel [
            (set (reg/v:SF 289 [ f00 ])
                (mem/s/v:SF (post_inc:SI (reg/f:SI 551)) [2 gf+0 S4 A32]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (expr_list:REG_INC (reg/f:SI 551)
        (expr_list:REG_EQUAL (mem/s/v:SF (symbol_ref:SI ("gf") <var_decl
0x7f9a1cc6f500 gf>) [2 gf+0 S4 A32])
            (nil))))

...

(insn:HI 827 825 831 6 a.i:19 (parallel [
            (set (mem/s/v:SF (reg/f:SI 434) [2 gf+0 S4 A32])
                (reg/v:SF 289 [ f00 ]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (expr_list:REG_DEAD (reg/f:SI 434)
        (expr_list:REG_DEAD (reg/v:SF 289 [ f00 ])
            (nil))))

(insn:HI 831 827 835 6 a.i:19 (parallel [
            (set (mem/s/v:SF (reg/f:SI 551) [2 gf+4 S4 A32])
                (reg/v:SF 288 [ f10 ]))
            (use (reg/v:PSI 151 ))
            (clobber (scratch:SI))
        ]) 205 {movsf_ie} (expr_list:REG_DEAD (reg/f:SI 551)
        (expr_list:REG_DEAD (reg/v:SF 288 [ f10 ])
            (nil))))


Spilling for insn 827.
Using reg 7 for reload 0
Using reg 78 for reload 2
Spilling for insn 831.
Using reg 2 for reload 0
Using reg 2 for reload 1
Using reg 2 for reload 2
Using reg 78 for reload 4

Reloads for insn # 827
...
Reload 1: reload_out (SF) = (mem/s/v:SF (reg/f:SI 2 r2 [434]) [2 gf+0 S4 A32])
        NO_REGS, RELOAD_FOR_OUTPUT (opnum = 0), optional
        reload_out_reg: (mem/s/v:SF (reg/f:SI 2 r2 [434]) [2 gf+0 S4 A32])
...

Reloads for insn # 831
...
Reload 1: reload_in (SI) = (mem/c:SI (plus:SI (plus:SI (reg/f:SI 15 r15)
                                                            (const_int 764
[0x2fc]))
                                                        (const_int 52 [0x34]))
[5 %sfp+-196 S4 A32])
        GENERAL_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 0), can't combine
        reload_in_reg: (reg/f:SI 551)
        reload_reg_rtx: (reg/f:SI 2 r2 [434])
...


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37514