[Bug target/23322] [4.1/4.2/4.3 regression] performance regression

[ubizjak at gmail dot com]

------- Comment #22 from ubizjak at gmail dot com  2008-02-06 06:52 -------
(In reply to comment #21)

> Obviously this heuristic is misbehaving in such a simple cases where no other
> registers are carried over loop.  One obvious problem is also that it is in
> effect for SSE codegen too.  I am testing following patch that solves the
> second problem:
> 
> Index: loop-invariant.c
> ===================================================================
> *** loop-invariant.c    (revision 131965)
> --- loop-invariant.c    (working copy)
> *************** get_inv_cost (struct invariant *inv, int
> *** 1012,1017 ****
> --- 1012,1018 ----
>       rtx set = single_set (inv->insn);
>       if (set
>          && IS_STACK_MODE (GET_MODE (SET_SRC (set)))
> +        && (!TARGET_SSE_MATH || !SSE_FLOAT_MODE_P (GET_MODE (SET_SRC (set))))
>          && constant_pool_constant_p (SET_SRC (set)))
>         (*regs_needed) += 2;
>     }
> 
> and cure this problem for -mfpmath=SSE at least. On 64bit target this now does

But we _have_ following in i386.h:

#define IS_STACK_MODE(MODE)                                     \
  (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH))      \
   || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH))  \
   || (MODE) == XFmode)

I need my morning coffee, the above logic is ATM a bit hard to decipher. ;)


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23322