[Bug target/27619] wrong code for mixed-mode division with -mpowerpc64 -O1

bergner at gcc dot gnu dot org gcc-bugzilla@gcc.gnu.org
Thu Aug 28 03:54:00 GMT 2008



------- Comment #13 from bergner at gcc dot gnu dot org  2008-08-28 03:52 -------
There are actually a subset of TARGET_POWERP64 instructions that are safe to
use in 32-bit mode regardless of whether OS_MISSING_POWERPC64 is set or not
(eg, fcfid).  For example, given the code below:

double
di2df (long long *di)
{
  return *di;
}

It should be safe to generate:

  lfd 0,0(3)
  fcfid 1,0
  blr

when compiling with -m32 as long as we are targeting a 64-bit processor (eg,
-mcpu=power6).  However, the floatdidf2 pattern is guarded with
TARGET_POWERPC64, so we end up generating a call to __floatdidf instead.


-- 

bergner at gcc dot gnu dot org changed:

           What    |Removed                     |Added
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                 CC|                            |bergner at gcc dot gnu dot
                   |                            |org


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27619



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