[Bug target/31985] Wide operations (i.e. adddi3) are split too late

ubizjak at gmail dot com gcc-bugzilla@gcc.gnu.org
Fri May 18 21:52:00 GMT 2007



------- Comment #1 from ubizjak at gmail dot com  2007-05-18 22:52 -------
Similar problems are shown for DImode store in following test:

--cut here--
typedef unsigned SI __attribute__ ((mode (SI)));
typedef unsigned DI __attribute__ ((mode (DI)));

#define umul_ppmm_c(w1, w0, u, v)               \
  {                                             \
    DI __c = (DI) u * v;                        \
                                                \
    (w0) = (SI) (__c & 0xffffffff);             \
    (w1) = (SI) (__c >> 32);                    \
  }

#define umul_ppmm_asm(w1, w0, u, v)                                     \
  __asm__ ("mull %3"                                                    \
           : "=a" ((SI) (w0)),                                          \
           "=d" ((SI) (w1))                                             \
           : "%0" ((SI) (u)),                                           \
           "rm" ((SI) (v)))

void test_c (SI a, SI b)
{
 volatile SI x, y;

 umul_ppmm_c (x, y, a, b);
}

void test_asm (SI a, SI b)
{
 volatile SI x, y;

 umul_ppmm_asm (x, y, a, b);
}
--cut here--

gcc -O2 -fomit-frame-pointer

test_c:
        subl    $16, %esp
        movl    24(%esp), %eax
        mull    20(%esp)
        movl    %eax, 8(%esp)
        movl    %edx, %eax
        xorl    %edx, %edx
        movl    %eax, 12(%esp)
        addl    $16, %esp
        ret

test_asm:
        subl    $16, %esp
        movl    20(%esp), %eax
#APP
        mull 24(%esp)
#NO_APP
        movl    %eax, 8(%esp)
        movl    %edx, 12(%esp)
        addl    $16, %esp
        ret


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31985



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