[Bug target/30961] [4.2/4.3 regression] redundant reg/mem stores/moves

steven at gcc dot gnu dot org gcc-bugzilla@gcc.gnu.org
Fri May 11 17:26:00 GMT 2007



------- Comment #5 from steven at gcc dot gnu dot org  2007-05-11 18:26 -------
For gcc 3.4, same function convert, lreg:


;; Register 60 in 5.
;; Register 62 in 0.
(note:HI 2 0 27 NOTE_INSN_DELETED)

;; Start of basic block 0, registers live: 5 [di] 6 [bp] 7 [sp] 16 [argp] 20
[frame]
(note:HI 27 2 3 0 [bb 0] NOTE_INSN_BASIC_BLOCK)

(insn:HI 3 27 4 0 (set (reg/v:SI 60 [ in ])
        (reg:SI 5 di [ in ])) 43 {*movsi_1_nointernunit} (nil)
    (expr_list:REG_DEAD (reg:SI 5 di [ in ])
        (nil)))

(note:HI 4 3 30 0 NOTE_INSN_FUNCTION_BEG)

(insn:HI 30 4 20 0 (set (subreg:SI (reg/v:SF 62 [ in ]) 0)
        (reg/v:SI 60 [ in ])) 43 {*movsi_1_nointernunit} (insn_list 3 (nil))
    (expr_list:REG_DEAD (reg/v:SI 60 [ in ])
        (nil)))

(note:HI 20 30 23 0 NOTE_INSN_FUNCTION_END)

(insn:HI 23 20 26 0 (set (reg/i:SF 21 xmm0 [ <result> ])
        (reg/v:SF 62 [ in ])) 91 {*movsf_1_nointerunit} (insn_list 30 (nil))
    (expr_list:REG_DEAD (reg/v:SF 62 [ in ])
        (nil)))

(insn:HI 26 23 0 0 (use (reg/i:SF 21 xmm0 [ <result> ])) -1 (insn_list 23
(nil))
    (nil))
;; End of basic block 0, registers live:
 6 [bp] 7 [sp] 16 [argp] 20 [frame] 21 [xmm0]



and later on .greg:


;; Function convert

;; 0 regs to allocate:
;; 60 conflicts: 60 5 7
;; 62 conflicts: 62 0 7

Spilling for insn 23.
Spilling for insn 23.

Reloads for insn # 23
Reload 0: reload_in (SF) = (reg/v:SF 0 ax [orig:62 in ] [62])
        SSE_REGS, RELOAD_FOR_INPUT (opnum = 1)
        reload_in_reg: (reg/v:SF 0 ax [orig:62 in ] [62])
        reload_reg_rtx: (reg/i:SF 21 xmm0 [ <result> ])
;; Register dispositions:
60 in 5  62 in 0

;; Hard regs used:  0 5 21

(note:HI 2 0 27 NOTE_INSN_DELETED)

;; Start of basic block 0, registers live: 5 [di] 7 [sp]
(note:HI 27 2 3 0 [bb 0] NOTE_INSN_BASIC_BLOCK)

(insn:HI 3 27 4 0 (set (reg/v:SI 5 di [orig:60 in ] [60])
        (reg:SI 5 di [ in ])) 43 {*movsi_1_nointernunit} (nil)
    (nil))

(note:HI 4 3 30 0 NOTE_INSN_FUNCTION_BEG)

(insn:HI 30 4 20 0 (set (reg:SI 0 ax [orig:62 in ] [62])
        (reg/v:SI 5 di [orig:60 in ] [60])) 43 {*movsi_1_nointernunit}
(insn_list 3 (nil))
    (nil))

(note:HI 20 30 33 0 NOTE_INSN_FUNCTION_END)

(insn 33 20 34 0 (set (mem:SF (plus:DI (reg/f:DI 7 sp)
                (const_int -4 [0xfffffffffffffffc])) [0 S4 A8])
        (reg/v:SF 0 ax [orig:62 in ] [62])) 91 {*movsf_1_nointerunit} (nil)
    (nil))

(insn 34 33 23 0 (set (reg/i:SF 21 xmm0 [ <result> ])
        (mem:SF (plus:DI (reg/f:DI 7 sp)
                (const_int -4 [0xfffffffffffffffc])) [0 S4 A8])) 91
{*movsf_1_nointerunit} (nil)
    (nil))

(insn:HI 23 34 26 0 (set (reg/i:SF 21 xmm0 [ <result> ])
        (reg/i:SF 21 xmm0 [ <result> ])) 91 {*movsf_1_nointerunit} (insn_list
30 (nil))
    (nil))

(insn 26 23 32 0 (use (reg/i:SF 21 xmm0 [ <result> ])) -1 (insn_list 23 (nil))
    (nil))
;; End of basic block 0, registers live:
 6 [bp] 7 [sp] 16 [argp] 20 [frame] 21 [xmm0]


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=30961



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