[Bug target/31361] SSE2 generation bug with shifts

rth at gcc dot gnu dot org gcc-bugzilla@gcc.gnu.org
Tue Mar 27 00:37:00 GMT 2007



------- Comment #5 from rth at gcc dot gnu dot org  2007-03-27 01:37 -------
You can shift the 32-bit portions individually.  But your test case will now
result in 0,0,0,0 for all optimization levels, since the shift count is taken
from the entire xmm register.  In this case, since there is an 8 in each of
the 4 32-bit portions, the shift count is extremely large.

Fixed.


-- 

rth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361



More information about the Gcc-bugs mailing list