[Bug regression/32582] Bootstrap with vectorization enabled fails with ICE on PPC

[rakdver at kam dot mff dot cuni dot cz]

------- Comment #9 from rakdver at kam dot mff dot cuni dot cz  2007-07-28 19:27 -------
Subject: Re:  Bootstrap with vectorization enabled fails with ICE on PPC

> > v0 (and v10 are scratch registers and not saved.
> 
> so does it look like a register allocation bug then? 

not really; it seems like a md problem (the registers v0-v19
are not marked as call clobbered); the patch below should
fix the problem.

Index: testsuite/gcc.dg/pr32582.c
===================================================================
*** testsuite/gcc.dg/pr32582.c  (revision 0)
--- testsuite/gcc.dg/pr32582.c  (revision 0)
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do run { target { powerpc*-*-* && powerpc_altivec_ok } } } */
+ /* { dg-options "-O2 -ftree-vectorize -maltivec" } */
+ 
+ #include <stdlib.h>
+ #include <string.h>
+ 
+ char a[64];
+ 
+ void set (void)
+ {
+   int i;
+ 
+   for (i = 0; i < 64; i++)
+     a[i] = 'x';
+ }
+ 
+ void check (void)
+ {
+   int i;
+ 
+   for (i = 0; i < 64; i++)
+     if (a[i] != 0)
+       abort ();
+ }
+ 
+ int main (void)
+ {
+   set ();
+   memset (a, 0, sizeof a);
+   check ();
+   return 0;
+ }
Index: config/rs6000/rs6000.h
===================================================================
*** config/rs6000/rs6000.h      (revision 126932)
--- config/rs6000/rs6000.h      (working copy)
*************** extern enum rs6000_nop_insertion rs6000_
*** 699,706 ****
     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,        \
     /* AltiVec registers.  */                     \
!    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
!    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1                                                  \
     , 1, 1, 1                                       \
  }
--- 699,706 ----
     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,        \
     /* AltiVec registers.  */                     \
!    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
!    1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1                                                  \
     , 1, 1, 1                                       \
  }
*************** extern enum rs6000_nop_insertion rs6000_
*** 718,725 ****
     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,        \
     /* AltiVec registers.  */                     \
!    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
!    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     0, 0                                                  \
     , 0, 0, 0                                       \
  }
--- 718,725 ----
     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1,        \
     /* AltiVec registers.  */                     \
!    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
!    1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
     0, 0                                                  \
     , 0, 0, 0                                       \
  }


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32582