[Bug target/32869] New: _mm_cvtsi64x_si128/_mm_cvtsi64_si128 are valid in 32-bit x86 code as well

[dean at arctic dot org]

it's not clear to me why there is an ifdef __x86_64__ around the definitions of
_mm_cvtsi64_si128/_mm_cvtsi64x_si128 in emmintrin.h.  the movq instruction
required to implement those has always been present in sse2 -- even on 32-bit
hosts.

gcc seems to do the right thing already if i just remove the #ifdef
__x86_64__... for example:


% cat movq.c
#include <inttypes.h>
#include <emmintrin.h>

static __inline __m128i __attribute__((__always_inline__))
_mm_cvtsi64x_si128 (long long __A)
{
    return _mm_set_epi64x (0, __A);
}

void foo(__m128i *x, const uint64_t *y)
{
  *x = _mm_cvtsi64x_si128(*y);
}

generates:

00000000 <foo>:
   0:   55                      push   %ebp
   1:   89 e5                   mov    %esp,%ebp
   3:   8b 45 0c                mov    0xc(%ebp),%eax
   6:   f3 0f 7e 00             movq   (%eax),%xmm0
   a:   8b 45 08                mov    0x8(%ebp),%eax
   d:   66 0f 7f 00             movdqa %xmm0,(%eax)
  11:   5d                      pop    %ebp
  12:   c3                      ret

(mind you i used a 4.1.2 gcc there, not 4.3... 'cause i neglected to build the
32-bit 4.3.x gcc.  but the ifdefs are still present in the header file.)

-dean


-- 
           Summary: _mm_cvtsi64x_si128/_mm_cvtsi64_si128 are valid in 32-bit
                    x86 code as well
           Product: gcc
           Version: 4.3.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: dean at arctic dot org
 GCC build triplet: i686-unknown-linux-gnu
  GCC host triplet: i686-unknown-linux-gnu
GCC target triplet: i686-unknown-linux-gnu


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32869