[Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86

[rask at gcc dot gnu dot org]

------- Comment #18 from rask at gcc dot gnu dot org  2007-12-19 14:15 -------
Created an attachment (id=14795)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=14795&action=view)
(u)mulsidi3 patch

This patch (in testing) improves the register allocation, removing the last
redundant movl instructions:

mul:
        pushl   %ebx                    # 40    *pushsi2        [length = 1]
        movl    8(%esp), %ebx           # 28    *movsi_1/1      [length = 4]
        movl    16(%esp), %eax          # 30    *movsi_1/1      [length = 4]
        movl    20(%esp), %ecx          # 37    *movsi_1/1      [length = 4]
        movl    12(%esp), %edx          # 38    *movsi_1/1      [length = 4]
        imull   %ebx, %ecx              # 7     *mulsi3_1/3     [length = 3]
        imull   %eax, %edx              # 8     *mulsi3_1/3     [length = 3]
        addl    %edx, %ecx              # 9     *addsi_1/1      [length = 2]
        mull    %ebx                    # 33    *umulsidi3      [length = 2]
        popl    %ebx                    # 43    popsi1          [length = 1]
        leal    (%ecx,%edx), %edx       # 39    *lea_1          [length = 3]
        ret                             # 44    return_internal [length = 1]


-- 

rask at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |rask at gcc dot gnu dot org
                   |dot org                     |
             Status|RESOLVED                    |ASSIGNED
         Resolution|DUPLICATE                   |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585