[Bug target/27842] Miscompile of Altivec vec_abs (float) inside loop

[uweigand at gcc dot gnu dot org]

------- Comment #2 from uweigand at gcc dot gnu dot org  2006-05-31 16:59 -------
I'm not sure (subreg:SF (const_int)) is canonical RTL, I haven't seen
subregs of anything but REG or MEM.

In any case, I don't really see what this would buy us over an UNSPEC -- will
the  generic simplifier be able to evaluate this by re-interpreting the bit
pattern
as float according to the target representation?


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27842