[Bug tree-optimization/25918] gcc.dg/vect/vect-reduc-dot-s16.c scan-tree-dump-times vectorized 1 loops 1 and gcc.dg/vect/vect-reduc-pattern-2.c scan-tree-dump-times vectorized 2 loops 1 fail

[dorit at il dot ibm dot com]

------- Comment #1 from dorit at il dot ibm dot com  2006-01-26 09:07 -------
Can you please send the dump files generated by -fdump-tree-vect-details?

reduc-dot-s16.c needs the sdot_prodv4hi pattern, which is implemented for ia64,
so I'd expect one loop to be vectorized. I wonder what's the problem there.

In vect-reduc-pattern-2.c - does the vectorizer report vectorizing one loop?
The one loop (that sums shorts into and int accumulator) needs the
widen_ssumv4hi3 pattern to be vectorized, which is implemented for ia64. Does
that loop get vectorized?
The second loop however (that sums chars into and int accumulator) cannot be
vectorized on ia64 because the mode of the result of the widen_ssumv8qi3
pattern as implemented on ia64 in short, not int. If this is indeed the reason
for the failure we'd probably want to introduce finer keywords to represent the
available widening support (in target-supports.exp we currently have just a
"vect_widen_sum" keyword, which does not distinguish between char-to-short
summation and char-to-int summation).


-- 

dorit at il dot ibm dot com changed:

           What    |Removed                     |Added
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                 CC|                            |dorit at il dot ibm dot com


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25918