[Bug target/23831] [4.1 Regression] ICE in immed_double_const with vectorized multipication
uros at kss-loka dot si
gcc-bugzilla@gcc.gnu.org
Thu Sep 15 11:53:00 GMT 2005
------- Additional Comments From uros at kss-loka dot si 2005-09-15 11:53 -------
He problem is in following RTL:
(insn 30 29 31 1 (set (reg:V4SI 75)
(mem/u/i:V4SI (symbol_ref/u:SI ("*.LC0") [flags 0x2]) [3 S16 A128]))
541 {*movv4si_internal} (nil)
(expr_list:REG_EQUAL (const_vector:V4SI [
(const_int 5 [0x5])
(const_int 5 [0x5])
(const_int 5 [0x5])
(const_int 5 [0x5])
])
(nil)))
...
(insn 33 32 34 1 (set (subreg:TI (reg:V4SI 78) 0)
(lshiftrt:TI (subreg:TI (reg:V4SI 75) 0)
(const_int 32 [0x20]))) 709 {sse2_lshrti3} (nil)
(nil))
Somehow a TImode constant is produced, and it triggers the check below:
gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
|| GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
/* We can get a 0 for an error mark. */
|| GET_MODE_CLASS (mode) == MODE_VECTOR_INT
|| GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
/* We clear out all bits that don't belong in MODE, unless they and
our sign bit are all one. So we get either a reasonable negative
value or a reasonable unsigned value for this mode. */
width = GET_MODE_BITSIZE (mode);
if (width < HOST_BITS_PER_WIDE_INT
&& ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
!= ((HOST_WIDE_INT) (-1) << (width - 1))))
i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
else if (width == HOST_BITS_PER_WIDE_INT
&& ! (i1 == ~0 && i0 < 0))
i1 = 0;
else
/* We should be able to represent this value as a constant. */
>>> gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
HOSTS_BITS_PER_WIDE_INT is 32 bit for ia32, and TImode constants are 128 bit
wide. I don't know the correct solution here. If the assert is commented out,
the ICE goes away and produced code works as expected.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23831
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