[Bug rtl-optimization/20134] [4.0 Regression] 176.gcc miscompare with -m64 after DOM change

pinskia at gcc dot gnu dot org gcc-bugzilla@gcc.gnu.org
Tue Feb 22 09:51:00 GMT 2005


------- Additional Comments From pinskia at gcc dot gnu dot org  2005-02-22 01:15 -------
Ok, I see what is going on now.
This is a RTL optimization bug.
The following (in .combine) is being combined:
(insn 37 35 38 4 (set (reg:SI 131)
        (lshiftrt:SI (subreg/s/u:SI (reg/v:DI 122 [ x.4 ]) 4)
            (const_int 1 [0x1]))) -1 (nil)
    (expr_list:REG_DEAD (reg/v:DI 122 [ x.4 ])
        (nil)))

(insn 38 37 39 4 (set (reg/v:DI 122 [ x.4 ])
        (zero_extend:DI (reg:SI 131))) -1 (insn_list:REG_DEP_TRUE 37 (nil))
    (expr_list:REG_DEAD (reg:SI 131)
        (nil)))

(insn 39 38 40 4 (set (reg:CC 132)
        (compare:CC (reg/v:DI 122 [ x.4 ])
            (const_int 0 [0x0]))) -1 (insn_list:REG_DEP_TRUE 38 (nil))
    (nil))

Into:
(insn 39 38 40 4 (parallel [
            (set (reg:CC 132)
                (compare:CC (lshiftrt:DI (reg/v:DI 122 [ x.4 ])
                        (const_int 1 [0x1]))
                    (const_int 0 [0x0])))
            (set (reg/v:DI 122 [ x.4 ])
                (lshiftrt:DI (reg/v:DI 122 [ x.4 ])
                    (const_int 1 [0x1])))
        ]) 259 {*lshrdi3_internal3} (nil)
    (nil))

Which is wrong, see how we have DI mode here but we have SI mode before so now we are shifting all 
the way which is wrong.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|                            |1
   Last reconfirmed|0000-00-00 00:00:00         |2005-02-22 01:15:27
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20134



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