[Bug target/19161] No emms or femms emitted between MMX and FP instructions

[rth at gcc dot gnu dot org]

------- Additional Comments From rth at gcc dot gnu dot org  2005-08-23 21:30 -------
Actually, I lied about the CFG.  It's actually 1->3 with 2-3 still forming
the loop.  So LCM did the right thing, technically: for the case in which
the loop trip count is zero, we avoid the efpu insn.  

The problem is, the model we have wrt efpu/emms requires that they be used
in balanced pairs.  And, really, we'd prefer that these insns be pushed out
of loops when possible.

But I'm not sure how to address this at the moment.

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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19161