[Bug target/20924] [4.0/4.1 regression] inline float divide does not set correct fpu status flags

[sje at cup dot hp dot com]

------- Additional Comments From sje at cup dot hp dot com  2005-04-11 23:14 -------
The problem is that the inline divide instructions are generating frcpa
instructions that use the floating point status register (fpsr) 1 when
they should be using fpsr 0.

I will test a patch overnight and submit it if it passes the testing.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|                            |1
   Last reconfirmed|0000-00-00 00:00:00         |2005-04-11 23:14:10
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20924