[Bug middle-end/18164] [4.0 Regression] ICE on trivial invalid asm

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2004-11-29 02:21 -------
Subject: Bug 18164

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	pinskia@gcc.gnu.org	2004-11-29 02:21:28

Modified files:
	gcc            : ChangeLog gimplify.c 
	gcc/testsuite  : ChangeLog 
Added files:
	gcc/testsuite/gcc.dg: pr18164.c 

Log message:
	2004-11-18  Andrew Pinski  <pinskia@physics.uc.edu>
	
	PR middle-end/18164
	* gimplify.c (gimplify_asm_expr): If the length of an output operand
	is zero, do not process it, just let it go through.
	
	2004-11-28  Andrew Pinski  <pinskia@physics.uc.edu>
	
	* gcc.dg/pr18164.c: New test.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.6615&r2=2.6616
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/gimplify.c.diff?cvsroot=gcc&r1=2.87&r2=2.88
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/ChangeLog.diff?cvsroot=gcc&r1=1.4672&r2=1.4673
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/gcc.dg/pr18164.c.diff?cvsroot=gcc&r1=NONE&r2=1.1



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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18164