[Bug libstdc++/17627] M68060 fails with libstdc++-v3/config/cpu/m68k/atomicity.h

peter at the-baradas dot com gcc-bugzilla@gcc.gnu.org
Thu Nov 4 02:17:00 GMT 2004


------- Additional Comments From peter at the-baradas dot com  2004-11-04 02:17 -------
Chris Johns <cjohns@cybertec.com.au> asked me:

>Is the Coldfire aligned to a 2 byte boundary or a 4 byte boundary ?

The Colfire operates the same as the x86 in that the cache/bus unit will
automagically handle unaligned data as multiple aligned accesses for smaller
data sizes (i.e. byte-short-byte) to the bus/cache to access a long on a
0bxxxxxx11 address without a software trap.

Chris also asks in comment #11:

>Would a stack aligned this way cause a slow down if the call/ret address being
>pushed and popped is not aligned to a 32bit boundary ?

On the ColdFire core there will be a *measurable* performance hit if the stack
is not kept long aligned since the interface from the ColdFire core to the cache
unit will have to prevent accesses that can straddle alignment boundaries, so an
access that is entirely within a cache line boundary, but is unaligned(for the
size of the access) will still be broken up into seperate aligned accesses to
the cache.  The 16 bit instruction alignement performance penalty is mitigated
by the instruction pre-fetch unit performing 32-bit aligned accesses to the
cache/bus unit.



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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17627



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