[Bug c/14631] common subexpression elimilation error with sse2 instrinsic _mm_insert_epi16
chbchb1130 at sina dot com
gcc-bugzilla@gcc.gnu.org
Thu Mar 18 13:37:00 GMT 2004
------- Additional Comments From chbchb1130 at sina dot com 2004-03-18 13:37 -------
(In reply to comment #0)
> when gcc do cse with my sse2 program,it eliminate the RTL generate by
> _mm_insert_epi16 mistakenly.
(In reply to comment #1)
> Created an attachment (id=5940)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=5940&action=view)
> preprocessed testcase
> when I turn on the -O optimization swith,I get the wrong result:
> 65535 65535 65535 65535 65535 65535 65535 65535
> 0 0 0 0 0 0 0 0
> 65535 65535 65535 65535 65535 65535 65535 65535
> the correct result is :
> 65535 65535 65535 65535 65535 65535 65535 65535
> 0 65535 65535 65535 65535 65535 65535 65535
> 65535 65535 65535 65535 65535 65535 65535 65535
if I modify the pattern of sse2_pinsrw in i386.md :22089 from vector_merge to
unspec, the bug is fixed.
initial version:
(define_insn "sse2_pinsrw"
[(set (match_operand:V8HI 0 "register_operand" "=x")
(vec_merge:V8HI (match_operand:V8HI 1 "register_operand" "0")
(vec_duplicate:V8HI
(truncate:HI
(match_operand:SI 2 "nonimmediate_operand" "rm")))
(match_operand:SI 3 "const_0_to_255_operand" "N")))]
"TARGET_SSE2"
"pinsrw\t{%3, %2, %0|%0, %2, %3}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "TI")])
modified version:
(define_insn "sse2_pinsrw"
[(set (match_operand:V8HI 0 "register_operand" "=x")
(unspec:V8HI (match_operand:V8HI 1 "register_operand" "0")
(vec_duplicate:V8HI
(truncate:HI
(match_operand:SI 2 "nonimmediate_operand" "rm")))
(match_operand:SI 3 "const_0_to_255_operand" "N")))]
"TARGET_SSE2"
"pinsrw\t{%3, %2, %0|%0, %2, %3}"
[(set_attr "type" "ssecvt")
(set_attr "mode" "TI")])
--
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution| |FIXED
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14631
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