[Bug rtl-optimization/15792] missed subreg optimization

[bangerth at dealii dot org]

------- Additional Comments From bangerth at dealii dot org  2004-06-15 20:06 -------
Indeed. In test1, we get a completely bogus sequence: 
	movl	12(%ebp), %edx 
	movl	8(%ebp), %eax 
	movl	%edx, %ecx 
	orl	%eax, %ecx 
What is the compiler thinking, moving data first into adx just to move 
it further into ecx the next moment? 
 
W. 

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|                            |1
   Last reconfirmed|0000-00-00 00:00:00         |2004-06-15 20:07:00
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=15792