[Bug c/17201] New: Incorrect code generated for logical shift
Nigel dot Hathaway at arm dot com
gcc-bugzilla@gcc.gnu.org
Thu Aug 26 14:39:00 GMT 2004
static int
ins_will_execute(unsigned long ins)
{
unsigned long psr = get_register(PS); // condition codes
int res = 0;
switch ((ins & 0xF0000000) >> 28) {
generates the following (as reported by gdb):
0x0000b1b8 <ins_will_execute>: mov r12, sp
0x0000b1bc <ins_will_execute+4>: stmdb sp!, {r11, r12, lr, pc}
0x0000b1c0 <ins_will_execute+8>: sub r11, r12, #4 ; 0x4
0x0000b1c4 <ins_will_execute+12>: sub sp, sp, #20 ; 0x14
0x0000b1c8 <ins_will_execute+16>: str r0, [r11, #-16]
unsigned long psr = get_register(PS); // condition codes
0x0000b1cc <ins_will_execute+20>: ldr r3, [pc, #808] ; 0xb4fc <$d>
0x0000b1d0 <ins_will_execute+24>: ldr r3, [r3]
0x0000b1d4 <ins_will_execute+28>: ldr r3, [r3, #64]
0x0000b1d8 <ins_will_execute+32>: str r3, [r11, #-20]
int res = 0;
0x0000b1dc <ins_will_execute+36>: mov r3, #0 ; 0x0
0x0000b1e0 <ins_will_execute+40>: str r3, [r11, #-24]
switch ((ins & 0xF0000000) >> 28) {
0x0000b1e4 <ins_will_execute+44>: ldr r3, [r11, #-16]
0x0000b1e8 <ins_will_execute+48>: and r3, r3, #-268435456 ; 0xf0000000
0x0000b1ec <ins_will_execute+52>: mov r3, r3, lsl #28
0x0000b1f0 <ins_will_execute+56>: cmp r3, #15 ; 0xf
0x0000b1f4 <ins_will_execute+60>: ldrls pc, [pc, r3, lsl #2]
0x0000b1f8 <ins_will_execute+64>: b 0xb4ec <$a+688>
Note <ins_will_execute+52>: the generated code is a shift left, whereas the
source code is a shift right. [The code snippet is from eCos debug single step
support.]
--
Summary: Incorrect code generated for logical shift
Product: gcc
Version: 3.4.0
Status: UNCONFIRMED
Severity: critical
Priority: P2
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: Nigel dot Hathaway at arm dot com
CC: gcc-bugs at gcc dot gnu dot org
GCC host triplet: i686-cygwin
GCC target triplet: arm-elf-gcc
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17201
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